Lattice Semiconductor
PCI Express User’s Guide
each packet is derived by subtracting the Credit Consumed from the Credit Limit (CA = CL - CC). The Credit Avail-
able value is calculated and stored separately for packet types P, NP and CPL and is made available to the user
logic for the selected packet type.
It is expected that the user logic take into account the Available Credit before sending a request to the core for
transmitting a TLP.
The core will not verify the credit availability while transmitting a TLP.
Error Conditions
Receive logic of the core checks the received DLLP and TLPs for various error conditions. In case of error, associ-
ated signals are asserted to the user logic and the DLLP or TLP is processed as per the speci?cation requirement.
Details of the error conditions are described below:
Unsupported Request
The following types of TLPs are not supported by the core:
? Con?guration Read Type 1
? Con?guration Write Type 1
? I/O Read Request
? I/O Write Request
? Memory Read Request-Locked
? Completion for Locked Memory Read without Data - Used only in error case.
? Completion for Locked Memory Read - otherwise like CplD.
If the core receives any one of these types of TLPs, an error is transmitted by the user interface signal
un_sup_req .
Poisoned TLP
There is no support to generate Data Poisoned TLP for transmission. But the core supports Data poisoning checks
in the received TLP.
If the EP bit in a received Write Request (Posted or Non-Posted) or a Read Completion TLP (bit14 of header1) is
set the core transmits the error in the user interface signal pois_tlp .
Malformed TLP
Malformed TLP detection is noti?ed for the following cases:
? Size of TLP is more than max_payload_size (256 DWORD)
? Size of TLP exceeds length ?eld
? Size of TLP doesn’t match length ?eld
? Unde?ned type of TLPs
? Default Traf?c Class designator violation for Power Management message and Error Signaling messages
The core transmits the error in the user interface signal malf_tlp .
Bad TLP
This error signal is generated to indicate that the received TLP is erroneous when there is no rx_err signal from
the Electrical Sub Block of the Physical Layer. The condition that leads to asserting this signal are listed below:
? CRC mismatch for Nulli?ed TLP
9
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